Architectures for Computer Vision

This book aims to ill in the gaps between computer vision and Verilog HDL design. For this purpose, we have to learn about the four disciplines: Verilog HDL, vision principles, vision architectures, and Verilog design. This area, which we call vision architecture, paves the way from vision algorithm to chip design, and is deined by the related ields, the implementing devices, and the vision hierarchy.

In terms of related ields, vision architecture is a multidisciplinary research area, particularly related to computer vision, computer architecture, and VLSI design. In computer vision, the typical goal of the research is to design serial algorithms, often implemented in high-level programming languages and rarely in dedicated chips. Unlike the well-established design low from computer architecture to VLSI
design, the low from vision algorithm to computer architecture, and further to VLSI chips, is not well-deined.We overcome this dificulty by delineating the path between vision algorithm and VLSI design.

Vision architecture is implemented on many different devices, such as DSP, GPU, embedded pro-cessors, FPGA, and ASICs. Unlike programming software, where the programming paradigm is moreor less homogeneous, designing and implementing hardware is highly heterogeneous in that different devices require completely different expertise and design tools. We focus on Verilog HDL, one of the representative languages for designing FPGA/ASICs.

Table of Contents

Part 1 Verilog HDLChapter
Chapter 1 Introduction
Chapter 2 Verilog HDL, Communication, and Control
Chapter 3 Processor, Memory, and Array
Chapter 4 Verilog Vision Simulator

Part 2 Vision PrinciplesChapter
Chapter 5 Energy Function
Chapter 6 Stereo Vision
Chapter 7 Motion and Vision Modules

Part 3 Vision ArchitecturesChapter
Chapter 8 Relaxation for Energy Minimization
Chapter 9 Dynamic Programming for Energy Minimization
Chapter 10 Belief Propagation and Graph Cuts for Energy Minimization

Part 4 Verilog DesignChapter
Chapter 11 Relaxation for Stereo Matching
Chapter 12 Dynamic Programming for Stereo Matching
Chapter 13 Systolic Array for Stereo Matching
Chapter 14 Belief Propagation for Stereo Matching