Embedded Memory Design for Multi-Core and Systems on Chip

This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.

Table of Contents

Chapter 1: Introduction
Chapter 2: Cache Architecture and Main Blocks
Chapter 3: Embedded Memory Hierarchy
Chapter 4: SRAM-Based Memory Operation and Yield
Chapter 5: Power and Yield for SRAM Memory
Chapter 6: Leakage Reduction
Chapter 7: Embedded Memory Verification
Chapter 8: Embedded Memory Design Validation and Design For Test
Chapter 9: Emerging Memory Technology Opportunities and Challenges