Multicore Technology: Architecture, Reconfiguration, and Modeling Front Cover

Multicore Technology: Architecture, Reconfiguration, and Modeling

  • Length: 491 pages
  • Edition: 1
  • Publisher:
  • Publication Date: 2013-07-26
  • ISBN-10: 1439880638
  • ISBN-13: 9781439880630
  • Sales Rank: #9613589 (See Top 100 Books)
Description

Multicore Technology: Architecture, Reconfiguration, and Modeling (Embedded Multi-Core Systems)

The saturation of design complexity and clock frequencies for single-core processors has resulted in the emergence of multicore architectures as an alternative design paradigm. Nowadays, multicore/multithreaded computing systems are not only a de-facto standard for high-end applications, they are also gaining popularity in the field of embedded computing.

The start of the multicore era has altered the concepts relating to almost all of the areas of computer architecture design, including core design, memory management, thread scheduling, application support, inter-processor communication, debugging, and power management. This book gives readers a holistic overview of the field and guides them to further avenues of research by covering the state of the art in this area. It includes contributions from industry as well as academia.

Table of Contents

Part I. Architecture and Design Flow
Chapter 1. MORA: High-Level FPGA Programming Using a Many-Core Framework
Chapter 2. Implementing Time-Constrained Applications on a Predictable MPSoC
Chapter 3. SESAM: AVirtual Prototyping Solution to Design Multicore Architectures

Part II. Parallelism and Optimization
Chapter 4. Verified Multicore Parallelism Using Atomic Verifiable Operations
Chapter 5. Accelerating Critical Section Execution with Multicore Architectures

Part III. Memory Systems
Chapter 6. TMbox: A Flexible and Reconfigurable Hybrid Transactional Memory System
Chapter 7. EM2
Chapter 8. CAFÉ: Cache-Aware Fair and Efficient Scheduling for CMPs

Part IV. Debugging
Chapter 9. Software Debugging Infrastructure for Multicore Systems-on-Chip

Part V. Networks-on-Chip
Chapter 10. On Chip Interconnects for Multicore Architectures
Chapter 11. Routing in Multicore NoCs
Chapter 12. Efficient Topologies for 3-D Networks-on-Chip
Chapter 13. Network-on-Chip Performance Evaluation Using an Analytical Method

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