Very large-scale integration is the process of creating an integrated circuit by combining millions of MOS transistors onto a single chip. VLSI began in the 1970s when MOS integrated circuit chips were widely adopted, enabling complex semiconductor and telecommunication technologies to be developed.
To introduce the technology, design concepts and testing of Very Large Scale Integrated
· To learn the basic CMOS circuits.
· To learn the CMOS process technology.
· To learn techniques of chip design using programmable devices.
· To learn the concepts of designing VLSI subsystems.
· To learn the concepts of modeling a digital system using Hardware Description
UNIT I CMOS TECHNOLOGY :-
A brief History-MOS transistor, Ideal I-V characteristics, C-V characteristics, Non ideal I- V effects, DC transfer characteristics – CMOS technologies, Layout design Rules, CMOS process
enhancements, Technology related CAD issues, Manufacturing issues
UNIT II CIRCUIT CHARACTERIZATION AND SIMULATION :-
Delay estimation, Logical effort and Transistor sizing, Power dissipation, Interconnect, Design margin, Reliability, Scaling- SPICE tutorial, Device models, Device
characterization, Circuit characterization, Interconnect simulation
UNIT III COMBINATIONAL AND SEQUENTIAL CIRCUIT DESIGN :-
Circuit families –Low power logic design – comparison of circuit families – Sequencing
static circuits, circuit design of latches and flip flops, Static sequencing element methodology- sequencing dynamic circuits – synchronizers
UNIT IV CMOS TESTING :-
Need for testing- Testers, Text fixtures and test programs- Logic verification- Silicon
debug principles- Manufacturing test – Design for testability – Boundary scan
UNIT V SPECIFICATION USING VERILOG HDL :-
Basic concepts- identifiers- gate primitives, gate delays, operators, timing controls,
procedural assignments conditional statements, Data flow and RTL, structural gate level
switch level modeling, Design hierarchies, Behavioral and RTL modeling, Test benches,
Structural gate level description of decoder, equality detector, comparator, priority encoder, half adder, full adder, Ripple carry adder, D latch and D flipflop.