Transforming Reconfigurable Systems

Over the last three decades, Professor Peter Cheung has made significant contributions to a variety of areas, such as analogue and digital computer-aided design tools, high-level synthesis and hardware/software codesign, low-power and high-performance circuit architectures for signal and image processing, and mixed-signal integrated-circuit design. However, the area that has attracted his greatest attention is reconfigurable systems and their design, and his work has contributed to the transformation of this important and exciting discipline. This festschrift contains a unique collection of technical papers based on presentations at a workshop at Imperial College London in May 2013 celebrating Professor Cheung’s 60th birthday. Renowned researchers who have been inspired and motivated by his outstanding research in the area of reconfigurable systems are brought together from across the globe to offer their latest research in reconfigurable systems. Professor Cheung has devoted much of his professional career to Imperial College London, and has served with distinction as the Head of Department of Electrical and Electronic Engineering for several years. His outstanding capability and his loyalty to Imperial College and the Department of Electrical and Electronic Engineering are legendary. Professor Cheung has made tremendous strides in ensuring excellence in both research and teaching, and in establishing sound governance and strong financial endowment; but above all, he has made his department a wonderful place in which to work and study.

Table of Contents

Chapter 1. Accelerator-Rich Architectures — Computing Beyond Processors
Chapter 2. Whither Reconfigurable Computing?
Chapter 3. An FPGA-Based Floating Point Unit for Rounding Error Analysis
Chapter 4. The Shroud of Turing
Chapter 5. Smart Module Redundancy — Approaching Cost Efficient Radiation Tolerance
Chapter 6. Analysing Reconfigurable Computing Systems
Chapter 7. Custom Computing or Vector Processing?
Chapter 8. Maximum Performance Computing with Dataflow Technology
Chapter 9. Future DREAMS: Dynamically Reconfigurable Extensible Architectures for Manycore Systems
Chapter 10. Compact Code Generation and Throughput Optimization for Coarse-Grained Reconfigurable Arrays
Chapter 11. Some Statistical Experiments with Spatially Correlated Variation Maps
Chapter 12. On-Chip FPGA Debugging and Validation: From Academia to Industry, and Back Again
Chapter 13. Enabling Survival Instincts in Electronic Systems: An Energy Perspective